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Ishan Thakkar, Ph.D.

Calculated based on number of publications stored in Pure and citations from Scopus
20132022

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  • 2021

    ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing

    Shivanandamurthy, S. M., Thakkar, I. G. & Salehi, S. A., Jul 2021, Proceedings - 2021 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021. p. 200-205 6 p. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; vol. 2021-July).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • Characterization and Mitigation of Electromigration Effects in TSV-Based Power Delivery Network Enabled 3D-Stacked DRAMs

    Bose, B. & Thakkar, I., Jun 22 2021, GLSVLSI 2021 - Proceedings of the 2021 Great Lakes Symposium on VLSI. p. 101-107 7 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Design Exploration and Scalability Analysis of a CMOS-Integrated, Polymorphic, Nanophotonic Arithmetic-Logic Unit

    Karempudi, V. S. P., Datta, S. & Thakkar, I. G., Nov 15 2021, SenSys 2021 - Proceedings of the 2021 19th ACM Conference on Embedded Networked Sensor Systems. p. 628-634 7 p. (SenSys 2021 - Proceedings of the 2021 19th ACM Conference on Embedded Networked Sensor Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • Silicon Photonic Microring Based Chip-Scale Accelerator for Delayed Feedback Reservoir Computing

    Vatsavai, S. S. & Thakkar, I., Feb 2021, Proceedings - 34th International Conference on VLSI Design, VLSID 2021 - Held concurrently with 20th International Conference on Embedded Systems, ES 2021. p. 129-134 6 p. 9407379. (Proceedings of the IEEE International Conference on VLSI Design; vol. 2021-February).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • 2020

    Improving the Latency-Area Tradeoffs for DRAM Design with Coarse-Grained Monolithic 3D (M3D) Integration

    Huang, C. H. & Thakkar, I. G., Oct 2020, Proceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020. p. 417-420 4 p. 9283599. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors; vol. 2020-October).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • LoraX: Loss-aware approximations for energy-efficient silicon photonic networks-on-chip

    Sunny, F., Mirza, A., Thakkar, I., Pasricha, S. & Nikdast, M., Sep 7 2020, GLSVLSI 2020 - Proceedings of the 2020 Great Lakes Symposium on VLSI. p. 235-240 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    6 Scopus citations
  • PROTEUS: Rule-Based Self-Adaptation in Photonic NoCs for Loss-Aware Co-Management of Laser Power and Performance

    Vatsavai, S. S., Karempudi, V. S. P. & Thakkar, I., Sep 24 2020, 14th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2020. 9241712. (14th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2020).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • Redesigning photonic interconnects with silicon-on-sapphire device platform for ultra-low-energy on-chip communication

    Sai Praneeth Karempudi, V., Vatsavai, S. S. & Thakkar, I., Sep 7 2020, GLSVLSI 2020 - Proceedings of the 2020 Great Lakes Symposium on VLSI. p. 247-252 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • Unconventional Computing and What It Means for the Future of Interconnects

    Thakkar, I. & Ganguly, A., Oct 18 2020, 2020 13th International Workshop on Network on Chip Architectures, NoCArc 2020 - In conjunction with the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2020. p. 35 1 p. 9234578. (2020 13th International Workshop on Network on Chip Architectures, NoCArc 2020 - In conjunction with the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2020).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Open Access
  • 2019

    Work-in-progress: Mitigating write disturbance in phase change memory architectures

    Huang, C. H. & Thakkar, I. G., Oct 13 2019, Proceedings of the International Conference on Compliers, Architectures and Synthesis for Embedded Systems Companion, CASES 2019. a7. (Proceedings of the International Conference on Compliers, Architectures and Synthesis for Embedded Systems Companion, CASES 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • Work-in-progress: A scalable stochastic number generator for phase change memory based in-memory stochastic processing

    Shivanandamurthy, S. M., Thakkar, I. G. & Salehi, S. A., Oct 13 2019, Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES/ISSS 2019. a6. (Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES/ISSS 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations
  • Work-in-progress: Mitigating inter-channel crosstalk non-uniformity in microring filter arrays of photonic NoCs

    Karempudi, V. S. P. & Thakkar, I. G., Oct 13 2019, Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES/ISSS 2019. a8. (Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES/ISSS 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • 2018

    Cross-Layer thermal reliability management in silicon photonic networks-on-Chip

    Pasricha, S., Reddy Chittamuru, S. V. & Thakkar, I. G., May 30 2018, GLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI. p. 317-322 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    4 Scopus citations
  • Mitigating the Energy Impacts of VBTI Aging in Photonic Networks-on-Chip Architectures with Multilevel Signaling

    Thakkar, I. G. & Pasricha, S., Oct 2018, 2018 9th International Green and Sustainable Computing Conference, IGSC 2018. 8752130. (2018 9th International Green and Sustainable Computing Conference, IGSC 2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Scopus citations
  • Securing Photonic NoC Architectures from Hardware Trojans

    Pasricha, S., Chittamuru, S. V. R., Thakkar, I. G. & Bhat, V., Oct 26 2018, 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. 8512167. (2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    3 Scopus citations
  • SOTERIA: Exploiting process variations to enhance hardware security with photonic NoC architectures

    Chittamuru, S. V. R., Thakkar, I. G., Bhat, V. & Pasricha, S., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. a81. (Proceedings - Design Automation Conference; vol. Part F137710).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    8 Scopus citations
  • 2017

    Analyzing voltage bias and temperature induced aging effects in photonic interconnects for manycore computing

    Chittamuru, S. V. R., Thakkar, I. G. & Pasricha, S., Jul 11 2017, 2017 ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP 2017. 7974906. (International Workshop on System Level Interconnect Prediction, SLIP).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    12 Scopus citations
  • DyPhase: A Dynamic Phase Change Memory Architecture with Symmetric Write Latency

    Thakkar, I. G. & Pasricha, S., Mar 21 2017, Proceedings - 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems, VLSID 2017. p. 41-46 6 p. 7884755. (Proceedings - 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems, VLSID 2017).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    7 Scopus citations
  • Improving the reliability and energy-efficiency of high-bandwidth photonic NoC architectures with multilevel signaling

    Thakkar, I. G., Chittamuru, S. V. R. & Pasricha, S., Oct 19 2017, 2017 11th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017. 4. (2017 11th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    16 Scopus citations
  • 2016

    A comparative analysis of front-end and back-end compatible silicon photonic on-chip interconnects

    Thakkar, I. G., Chittamuru, S. V. R. & Pasricha, S., Jun 4 2016, Proceedings of the 18th ACM/IEEE System Level Interconnect Prediction 2016 Workshop, SLIP 2016. 2947362. (Proceedings of the 18th ACM/IEEE System Level Interconnect Prediction 2016 Workshop, SLIP 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    14 Scopus citations
  • Massed Refresh: An Energy-Efficient Technique to Reduce Refresh Overhead in Hybrid Memory Cube Architectures

    Thakkar, I. G. & Pasricha, S., Mar 16 2016, Proceedings - 29th International Conference on VLSI Design, VLSID 2016 - Held concurrently with 15th International Conference on Embedded Systems. p. 104-109 6 p. 7434935. (Proceedings of the IEEE International Conference on VLSI Design; vol. 2016-March).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    8 Scopus citations
  • Mitigation of homodyne crosstalk noise in silicon photonic NoC architectures with tunable decoupling

    Thakkar, I. G., Chittamuru, S. V. R. & Pasricha, S., Nov 21 2016, 2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016. 7750979. (2016 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    11 Scopus citations
  • PICO: Mitigating heterodyne crosstalk due to process variations and intermodulation effects in photonic NoCs

    Chittamuru, S. V. R., Thakkar, I. G. & Pasricha, S., Jun 5 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. a39. (Proceedings - Design Automation Conference; vol. 05-09-June-2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Open Access
    17 Scopus citations
  • Process variation aware crosstalk mitigation for DWDM based photonic NoC architectures

    Chittamuru, S. V. R., Thakkar, I. G. & Pasricha, S., May 25 2016, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. p. 57-62 6 p. 7479176. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2016-May).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    14 Scopus citations
  • Run-time laser power management in photonic NoCs with on-chip semiconductor optical amplifiers

    Thakkar, I. G., Chittamuru, S. V. R. & Pasricha, S., Sep 28 2016, 2016 10th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2016. 7579327. (2016 10th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    23 Scopus citations
  • 2015

    A novel 3D graphics DRAM architecture for high-performance and low-energy memory accesses

    Thakkar, I. G. & Pasricha, S., Dec 14 2015, Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015. p. 467-470 4 p. 7357150. (Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    3 Scopus citations
  • 2014

    3D-Wiz: A novel high bandwidth, optically interfaced 3D DRAM architecture with reduced random access time

    Thakkar, I. G. & Pasricha, S., Dec 3 2014, 2014 32nd IEEE International Conference on Computer Design, ICCD 2014. p. 1-7 7 p. 6974654. (2014 32nd IEEE International Conference on Computer Design, ICCD 2014).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    14 Scopus citations
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