Abstract
Photonic devices fabricated with back-end compatible silicon photonic (BCSP) materials can provide independence from the complex CMOS front-end compatible silicon photonic (FCSP) process, to significantly enhance photonic network-on-chip (PNoC) architecture performance. In this paper, we present a detailed comparative analysis of a number of design tradeoffs for CMOS front-end and backend compatible devices for silicon photonic interconnects. A crosslayer optimization of multiple device-level and link-level design parameters is performed to enable the design of energy-efficient on-chip photonic interconnects using BCSP devices. The optimized design of BCSP on-chip links renders more energy-efficiency and aggregate bandwidth than FCSP on-chip links, in spite of the inferior opto-electronic properties of BCSP devices. Our experimental analysis compares the use of BCSP and FCSP links at the architecture level, and shows that the optimized design of the BCSP-based Firefly PNoC achieves 1.15× greater throughput and 12.4% less energy-per-bit on average than the optimized design of FCSP-based Firefly PNoC. Similarly, the optimized design of the BCSP-based Corona PNoC achieves 3.5× greater throughput and 39.5% less energy-per-bit on average than the optimized design of FCSP-based Corona PNoC.
Original language | English |
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Title of host publication | Proceedings of the 18th ACM/IEEE System Level Interconnect Prediction 2016 Workshop, SLIP 2016 |
ISBN (Electronic) | 9781450344302 |
DOIs | |
State | Published - Jun 4 2016 |
Event | 2016 18th ACM/IEEE System Level Interconnect Prediction Workshop, SLIP 2016 - Austin, United States Duration: Jun 4 2016 → … |
Publication series
Name | Proceedings of the 18th ACM/IEEE System Level Interconnect Prediction 2016 Workshop, SLIP 2016 |
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Conference
Conference | 2016 18th ACM/IEEE System Level Interconnect Prediction Workshop, SLIP 2016 |
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Country/Territory | United States |
City | Austin |
Period | 6/4/16 → … |
Bibliographical note
Funding Information:This research is supported by grants from SRC, NSF (CCF-1252500, CCF-1302693), and AFOSR (FA9550-13-1-0110).
Publisher Copyright:
© 2016 ACM.
Keywords
- Aggregate bandwidth
- Design tradeoffs
- Energy efficiency
- Optimization
- Photonic network on chip
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Science Applications
- Hardware and Architecture
- Applied Mathematics