We analyzed the problems in observation of large leakage-current reduction of ultrathin SiO2 due to enhanced phonon-energy coupling. A lithographic method for fabrication of MOS capacitors with post-metal anneal is needed to have reproducible and reliable results. We developed a bilayer resist lithographic method based on all-organic resist and developer to fabricate Ni-gate MOS capacitors. The bilayer resist lift-off procedure uses SU-8 with Shipley S1813 as the intermediate layer. After development, an undercut profile of the bi-layer resist is clearly demonstrated. The Ni-gate MOS capacitors are fabricated successfully, which can withstand post-metal anneal. Experimental I-V and C-V curves, together with the C-V curves simulated using the Berkeley Quantum (QM) simulator, demonstrate that large leakage-current reduction (∼1000 x) can be reliably and reproducibly achieved on ultra thin Si02 (∼24 Å) after proper RTP processing.