A novel reversible TSG gate and its application for designing reversible carry look-ahead and other adder architectures

Himanshu Thapliyal, M. B. Srinivas

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

61 Scopus citations

Abstract

Reversible logic is emerging as a promising area of research having its applications in quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not reversible. In this paper, a new 4 *4 reversible gate called "TSG" gate is proposed and is used to design efficient adder units. The proposed gate is used to design ripple carry adder, BCD adder and the carry look-ahead adder. The most significant aspect of the proposed gate is that it can work singly as a reversible full adder i.e reversible full adder can now be implemented with a single gate only. It is demonstrated that the adder architectures using the proposed gate are much better and optimized, compared to their counterparts existing in literature, both in terms of number of reversible gates and the garbage outputs.

Original languageEnglish
Title of host publicationAdvances in Computer Systems Architecture - 10th Asia-Pacific Conference, ACSAC 2005, Proceedings
Pages805-817
Number of pages13
DOIs
StatePublished - 2005
Event10th Asia-Pacific Conference on Advances in Computer Systems Architecture, ACSAC 2005 - Singapore, Singapore
Duration: Oct 24 2005Oct 26 2005

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3740 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference10th Asia-Pacific Conference on Advances in Computer Systems Architecture, ACSAC 2005
Country/TerritorySingapore
CitySingapore
Period10/24/0510/26/05

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science

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