Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications

Himanshu Thapliyal; Zachary Kahleifeh

doi:10.1109/ISVLSI.2019.00081

Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications

Himanshu Thapliyal, Zachary Kahleifeh

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

Approximate computing is a circuit design technique that reduces area and power dissipation at the cost of accurate results. In this paper, we have investigated to further reduce the power dissipation of approximate circuits while maintaining high speeds using a form of energy recovery (ER) computing known as Pulse Boost Logic (PBL). To demonstrate power savings and speed capabilities, we have constructed an approximate 4-2 compressor circuit using PBL based ER computing. Simulations were performed using 45nm technology in Cadence Spectre. At 800 MHz, our results show the average power saving of 64% in PBL based approximate 4-2 compressor design compared to its standard CMOS based design. We also illustrate that the power saving of 89% can be achieved in 4-2 compressor by combining approximate and ER computing compared to CMOS based design of accurate 4-2 compressor. Further, we illustrate that the PBL based proposed approximate 4-2 compressor has 65% less energy consumption than the CMOS based approximate 4-2 compressor. We have verified the functionality of the proposed PBL based approximate 4-2 compressor up to 1 GHz to illustrate its application in low-power and low-energy Sub-GHz IoT applications.

Original language	English
Title of host publication	Proceedings - 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019
Pages	414-418
Number of pages	5
ISBN (Electronic)	9781538670996
DOIs	https://doi.org/10.1109/ISVLSI.2019.00081
State	Published - Jul 2019
Event	18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019 - Miami, United States Duration: Jul 15 2019 → Jul 17 2019

Publication series

Name	Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume	2019-July
ISSN (Print)	2159-3469
ISSN (Electronic)	2159-3477

Conference

Conference	18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019
Country/Territory	United States
City	Miami
Period	7/15/19 → 7/17/19

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

Funding

ACKNOWLEDGMENT This work was supported by the Kentucky Science and Engineering Foundation with the Kentucky Science and Technology Corporation under Grant KSEF-3526-RDE-019.

Funders	Funder number
Kentucky Science and Technology Corporation	KSEF-3526-RDE-019
Kentucky Science and Engineering Foundation

Keywords

Approximate arithmetic circuits
Approximate computing
Energy recovery computing
Internet of Things (IoT)

ASJC Scopus subject areas

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/ISVLSI.2019.00081

Cite this

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title = "Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications",

abstract = "Approximate computing is a circuit design technique that reduces area and power dissipation at the cost of accurate results. In this paper, we have investigated to further reduce the power dissipation of approximate circuits while maintaining high speeds using a form of energy recovery (ER) computing known as Pulse Boost Logic (PBL). To demonstrate power savings and speed capabilities, we have constructed an approximate 4-2 compressor circuit using PBL based ER computing. Simulations were performed using 45nm technology in Cadence Spectre. At 800 MHz, our results show the average power saving of 64% in PBL based approximate 4-2 compressor design compared to its standard CMOS based design. We also illustrate that the power saving of 89% can be achieved in 4-2 compressor by combining approximate and ER computing compared to CMOS based design of accurate 4-2 compressor. Further, we illustrate that the PBL based proposed approximate 4-2 compressor has 65% less energy consumption than the CMOS based approximate 4-2 compressor. We have verified the functionality of the proposed PBL based approximate 4-2 compressor up to 1 GHz to illustrate its application in low-power and low-energy Sub-GHz IoT applications.",

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Thapliyal, H & Kahleifeh, Z 2019, Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications. in Proceedings - 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019., 8839541, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, vol. 2019-July, pp. 414-418, 18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, United States, 7/15/19. https://doi.org/10.1109/ISVLSI.2019.00081

Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications. / Thapliyal, Himanshu; Kahleifeh, Zachary.
Proceedings - 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019. 2019. p. 414-418 8839541 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2019-July).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications

Abstract

Publication series

Conference

Bibliographical note

Funding

Keywords

ASJC Scopus subject areas

UN SDGs

Access to Document

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