Abstract
Parallel Bit Pattern computing (PBP) has been proposed as a way to dramatically reduce power consumption per computation by minimizing the total number of gate operations. In part, this reduction is accomplished by employing aggressive compiler optimization technology to gate-level representations of computations at runtime. Massive SIMD parallelism is used to obtain speedups while executing the optimized bit-serial code. However, the PBP model also can potentially exponentially reduce the number of active gates for each such operation by recognizing and operating on symbolically-compressed patterns of bits, rather than on each individual bit within a vector. This not only provides for efficient execution of traditional parallel code, but by using bit vectors to represent entangled superposition, enables quantum-like computation to be efficiently implemented using conventional circuitry. Building on lessons learned from various software and Verilog prototypes, this paper proposes a new set of basic operations and interface structure suitable for using inexpensive Xilinx Zynq-7000 boards to implement FGPA-hardware-accelerated PBP computation. Emphasis is on how these operations will implement quantum-like computation, as the first prototype system is currently still under development.
Original language | English |
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Title of host publication | Proceedings - 2021 International Conference on Rebooting Computing, ICRC 2021 |
Pages | 129-133 |
Number of pages | 5 |
ISBN (Electronic) | 9781665423328 |
DOIs | |
State | Published - 2021 |
Event | 2021 International Conference on Rebooting Computing, ICRC 2021 - Virtual, Online, United States Duration: Nov 30 2021 → Dec 2 2021 |
Publication series
Name | Proceedings - 2021 International Conference on Rebooting Computing, ICRC 2021 |
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Conference
Conference | 2021 International Conference on Rebooting Computing, ICRC 2021 |
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Country/Territory | United States |
City | Virtual, Online |
Period | 11/30/21 → 12/2/21 |
Bibliographical note
Publisher Copyright:© 2021 IEEE.
Keywords
- Computer Architecture
- Logic Optimization
- Optimizing Compilers
- Parallel Bit Pattern Computing
- SIMD
ASJC Scopus subject areas
- Artificial Intelligence
- Computational Theory and Mathematics
- Hardware and Architecture
- Software