Clustering scheduling for hardware tasks in reconfigurable computing systems

Reconfigurable computing systems have been used widely in various areas due to their attractive features in low-power and high-precision. However, how to increase utilization and throughput while reducing configuration and execution time overheads on large-scale data has become a great challenge for reconfigurable computing systems. In this paper, we employ a directed acyclic graph (DAG) to represent the tasks in an application. With considerations of task dependencies and resource constraints that are not sufficiently studied in literature, we propose two clustering scheduling strategies to reduce the number of configurations and the execution time of applications, while enhancing the utilization of field programmable gate array (FPGA) devices: One is a heuristic scheduling strategy and the other is a dynamic programming scheduling strategy. Experimental results indicate that our dynamic programming scheduling strategy can significantly reduce the number of configurations and improve the FPGA utilization, compared to the heuristic scheduling strategy.