Pointer and subscripted array references often touch memory locations for which there are several possible aliases; hence these references cannot be made from registers. Although conventional caches can increase performance somewhat, they do not provide many of the benefits of registers, and do not permit the compiler to perform many optimizations associated with register references. The CReg (pronounced 'C-Reg') mechanism combines the hardware structures of cache and registers to create a novel kind of memory structure, which can be used either as processor registers or as a replacement for conventional cache memory. By permitting aliased names to be grouped together, CRegs resolve ambiguous alias problems in hardware, resulting in more efficient execution that even the combination of conventional registers and cache can provide. The authors discuss both the conceptual CReg hardware structure and the compiler analysis and optimization techniques to manage that structure.