Data Allocation for Hybrid Memory with Genetic Algorithm

Meikang Qiu, Zhi Chen, Jianwei Niu, Ziliang Zong, Gang Quan, Xiao Qin, Laurence T. Yang

Research output: Contribution to journalArticlepeer-review

100 Scopus citations

Abstract

The gradually widening speed disparity between CPU and memory has become an overwhelming bottleneck for the development of chip multiprocessor systems. In addition, increasing penalties caused by frequent on-chip memory accesses have raised critical challenges in delivering high memory access performance with tight power and latency budgets. To overcome the daunting memory wall and energy wall issues, this paper focuses on proposing a new heterogeneous scratchpad memory architecture, which is configured from SRAM, MRAM, and Z-RAM. Based on this architecture, we propose a genetic algorithm to perform data allocation to different memory units, therefore, reducing memory access cost in terms of power consumption and latency. Extensive and experiments are performed to show the merits of the heterogeneous scratchpad architecture over the traditional pure memory system and the effectiveness of the proposed algorithms.

Original languageEnglish
Article number7031890
Pages (from-to)544-555
Number of pages12
JournalIEEE Transactions on Emerging Topics in Computing
Volume3
Issue number4
DOIs
StatePublished - 2015

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

  • Hybrid memory
  • MRAM
  • SPM
  • Z-RAM
  • chip multiprocessor
  • data allocation
  • genetic algorithm

ASJC Scopus subject areas

  • Computer Science (miscellaneous)
  • Information Systems
  • Human-Computer Interaction
  • Computer Science Applications

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