Data Allocation for Hybrid Memory with Genetic Algorithm

Meikang Qiu; Zhi Chen; Jianwei Niu; Ziliang Zong; Gang Quan; Xiao Qin; Laurence T. Yang

doi:10.1109/TETC.2015.2398824

Data Allocation for Hybrid Memory with Genetic Algorithm

Meikang Qiu, Zhi Chen, Jianwei Niu, Ziliang Zong, Gang Quan, Xiao Qin, Laurence T. Yang

Research output: Contribution to journal › Article › peer-review

103 Scopus citations

Abstract

The gradually widening speed disparity between CPU and memory has become an overwhelming bottleneck for the development of chip multiprocessor systems. In addition, increasing penalties caused by frequent on-chip memory accesses have raised critical challenges in delivering high memory access performance with tight power and latency budgets. To overcome the daunting memory wall and energy wall issues, this paper focuses on proposing a new heterogeneous scratchpad memory architecture, which is configured from SRAM, MRAM, and Z-RAM. Based on this architecture, we propose a genetic algorithm to perform data allocation to different memory units, therefore, reducing memory access cost in terms of power consumption and latency. Extensive and experiments are performed to show the merits of the heterogeneous scratchpad architecture over the traditional pure memory system and the effectiveness of the proposed algorithms.

Original language	English
Article number	7031890
Pages (from-to)	544-555
Number of pages	12
Journal	IEEE Transactions on Emerging Topics in Computing
Volume	3
Issue number	4
DOIs	https://doi.org/10.1109/TETC.2015.2398824
State	Published - 2015

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Funding

The work of M. Qiu was supported by the Division of Computer and Network Systems (CNS) through the National Science Foundation (NSF) under Grant CNS-1457506, Grant CNS-1359557, and Grant CNS-1249223. The work of Z. Zong was supported by NSF CNS-1305359. The work of J. Niu was supported by the National Natural Science Foundation of China under Grant 61170296 and Grant 61190125. The work of G. Quan was supported by NSF under Grant CNS-1423137 and Grant CNS-1018108.

Funders	Funder number
NSF CNS-1305359	CNS-1305359
National Natural Science Foundation of China (NSFC)	CNS-1018108, CNS-1423137, 61170296, 61190125
National Aerospace Science Foundation of China	CNS-1359557, CNS-1249223, CNS-1457506

Keywords

Hybrid memory
MRAM
SPM
Z-RAM
chip multiprocessor
data allocation
genetic algorithm

ASJC Scopus subject areas

Computer Science (miscellaneous)
Information Systems
Human-Computer Interaction
Computer Science Applications

Access to Document

10.1109/TETC.2015.2398824

Cite this

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title = "Data Allocation for Hybrid Memory with Genetic Algorithm",

abstract = "The gradually widening speed disparity between CPU and memory has become an overwhelming bottleneck for the development of chip multiprocessor systems. In addition, increasing penalties caused by frequent on-chip memory accesses have raised critical challenges in delivering high memory access performance with tight power and latency budgets. To overcome the daunting memory wall and energy wall issues, this paper focuses on proposing a new heterogeneous scratchpad memory architecture, which is configured from SRAM, MRAM, and Z-RAM. Based on this architecture, we propose a genetic algorithm to perform data allocation to different memory units, therefore, reducing memory access cost in terms of power consumption and latency. Extensive and experiments are performed to show the merits of the heterogeneous scratchpad architecture over the traditional pure memory system and the effectiveness of the proposed algorithms.",

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AU - Qin, Xiao

AU - Yang, Laurence T.

PY - 2015

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AB - The gradually widening speed disparity between CPU and memory has become an overwhelming bottleneck for the development of chip multiprocessor systems. In addition, increasing penalties caused by frequent on-chip memory accesses have raised critical challenges in delivering high memory access performance with tight power and latency budgets. To overcome the daunting memory wall and energy wall issues, this paper focuses on proposing a new heterogeneous scratchpad memory architecture, which is configured from SRAM, MRAM, and Z-RAM. Based on this architecture, we propose a genetic algorithm to perform data allocation to different memory units, therefore, reducing memory access cost in terms of power consumption and latency. Extensive and experiments are performed to show the merits of the heterogeneous scratchpad architecture over the traditional pure memory system and the effectiveness of the proposed algorithms.

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Data Allocation for Hybrid Memory with Genetic Algorithm

Abstract

Bibliographical note

Funding

Keywords

ASJC Scopus subject areas

Access to Document

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