TY - GEN
T1 - Design of a ternary barrel shifter using multiple-valued reversible logic
AU - Kotiyal, Saurabh
AU - Thapliyal, Himanshu
AU - Ranganathan, Nagarajan
PY - 2010
Y1 - 2010
N2 - Multiple-valued reversible logic is emerging as a promising computing paradigm as it helps in reducing the width of the reversible or quantum circuits. Further, a barrel shifter that can shift and rotate multiple bits in a single cycle forms the essence of many computing systems. In this paper, we propose an efficient architecture and design of a reversible ternary barrel shifter. The ternary barrel shifter is realized using the Modified Fredkin gates (MFG) and the ternary Feynman gates. The design is evaluated in terms of quantum cost, the number of garbage outputs and the number of ancilla bits. To our knowledge, the use of multiple valued reversible logic for the design of a barrel shifter is being attempted for the first time in the literature.
AB - Multiple-valued reversible logic is emerging as a promising computing paradigm as it helps in reducing the width of the reversible or quantum circuits. Further, a barrel shifter that can shift and rotate multiple bits in a single cycle forms the essence of many computing systems. In this paper, we propose an efficient architecture and design of a reversible ternary barrel shifter. The ternary barrel shifter is realized using the Modified Fredkin gates (MFG) and the ternary Feynman gates. The design is evaluated in terms of quantum cost, the number of garbage outputs and the number of ancilla bits. To our knowledge, the use of multiple valued reversible logic for the design of a barrel shifter is being attempted for the first time in the literature.
KW - Ancilla bits
KW - Modified Fredkin gate
KW - Quantum cost
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U2 - 10.1109/NANO.2010.5697870
DO - 10.1109/NANO.2010.5697870
M3 - Conference contribution
AN - SCOPUS:79951821153
SN - 9781424470334
T3 - 2010 10th IEEE Conference on Nanotechnology, NANO 2010
SP - 1104
EP - 1108
BT - 2010 10th IEEE Conference on Nanotechnology, NANO 2010
T2 - 2010 10th IEEE Conference on Nanotechnology, NANO 2010
Y2 - 17 August 2010 through 20 August 2010
ER -