Design of efficient reversible binary subtractors based on a new reversible gate

Himanshu Thapliyal, Nagarajan Ranganathan

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

110 Scopus citations

Abstract

Reversible logic has extensive applications in quantum computing, low power VLSI design, quantum dot cellular automata and optical computing. While several researchers have investigated the design of reversible logic elements, there is not much work reported on reversible binary subtractors. In this paper, we propose the design of a new reversible gate called TR gate. Further, we investigate the design of reversible binary subtractors based on the proposed TR gate. The proposed TR gate is better for designing reversible binary subtractor compared to such gates discussed in literature in terms of quantum cost, garbage outputs and complexity of gates.

Original languageEnglish
Title of host publicationProceedings of the 2009 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009
Pages229-234
Number of pages6
DOIs
StatePublished - 2009
Event2009 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009 - Tampa, FL, United States
Duration: May 14 2009May 15 2009

Publication series

NameProceedings of the 2009 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009

Conference

Conference2009 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2009
Country/TerritoryUnited States
CityTampa, FL
Period5/14/095/15/09

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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