Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic

S. Dinesh Kumar; Himanshu Thapliyal; Azhar Mohammad; Vijay Singh; Kalyan S. Perumalla

doi:10.1109/ISVLSI.2016.45

Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic

S. Dinesh Kumar, Himanshu Thapliyal, Azhar Mohammad, Vijay Singh, Kalyan S. Perumalla

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

15 Scopus citations

Abstract

Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for low power portable electronic devices and Internet-of-Things (IoT) based electronic devices.

Original language	English
Title of host publication	Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Pages	308-313
Number of pages	6
ISBN (Electronic)	9781467390385
DOIs	https://doi.org/10.1109/ISVLSI.2016.45
State	Published - Sep 2 2016
Event	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 - Pittsburgh, United States Duration: Jul 11 2016 → Jul 13 2016

Publication series

Name	Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume	2016-September
ISSN (Print)	2159-3469
ISSN (Electronic)	2159-3477

Conference

Conference	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Country/Territory	United States
City	Pittsburgh
Period	7/11/16 → 7/13/16

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

Adiabatic logic
Differential Power Analysis (DPA)
Low-power hardware
S-Box
Symmetric Pass Gate Adiabatic Logic (SPGAL)

ASJC Scopus subject areas

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

Access to Document

10.1109/ISVLSI.2016.45

Cite this

Kumar, S. D., Thapliyal, H., Mohammad, A., Singh, V., & Perumalla, K. S. (2016). Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic. In Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 (pp. 308-313). Article 7560215 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2016-September). https://doi.org/10.1109/ISVLSI.2016.45

@inproceedings{634a927332ae46cd8bb343836abb66be,

title = "Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic",

abstract = "Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for low power portable electronic devices and Internet-of-Things (IoT) based electronic devices.",

keywords = "Adiabatic logic, Differential Power Analysis (DPA), Low-power hardware, S-Box, Symmetric Pass Gate Adiabatic Logic (SPGAL)",

author = "Kumar, {S. Dinesh} and Himanshu Thapliyal and Azhar Mohammad and Vijay Singh and Perumalla, {Kalyan S.}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 ; Conference date: 11-07-2016 Through 13-07-2016",

year = "2016",

month = sep,

day = "2",

doi = "10.1109/ISVLSI.2016.45",

language = "English",

series = "Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI",

pages = "308--313",

booktitle = "Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016",

}

Kumar, SD, Thapliyal, H, Mohammad, A, Singh, V & Perumalla, KS 2016, Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic. in Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016., 7560215, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, vol. 2016-September, pp. 308-313, 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, United States, 7/11/16. https://doi.org/10.1109/ISVLSI.2016.45

Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic. / Kumar, S. Dinesh; Thapliyal, Himanshu; Mohammad, Azhar et al.
Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016. 2016. p. 308-313 7560215 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2016-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic

AU - Kumar, S. Dinesh

AU - Thapliyal, Himanshu

AU - Mohammad, Azhar

AU - Singh, Vijay

AU - Perumalla, Kalyan S.

PY - 2016/9/2

Y1 - 2016/9/2

N2 - Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for low power portable electronic devices and Internet-of-Things (IoT) based electronic devices.

AB - Differential Power Analysis (DPA) attack is considered to be a main threat while designing cryptographic processors. In cryptographic algorithms like DES and AES, S-Box is used to indeterminate the relationship between the keys and the cipher texts. However, S-box is prone to DPA attack due to its high power consumption. In this paper, we are implementing an energy-efficient 8-bit S-Box circuit using our proposed Symmetric Pass Gate Adiabatic Logic (SPGAL). SPGAL is energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. SPGAL is energy-efficient due to reduction of non-adiabatic loss during the evaluate phase of the outputs. Further, the S-Box circuit implemented using SPGAL is resistant to DPA attacks. The results are verified through SPICE simulations in 180nm technology. SPICE simulations show that the SPGAL based S-Box circuit saves upto 92% and 67% of energy as compared to the conventional CMOS and Secured Quasi-Adiabatic Logic (SQAL) based S-Box circuit. From the simulation results, it is evident that the SPGAL based circuits are energy-efficient as compared to the existing DPA-resistant adiabatic and non-adiabatic logic families. In nutshell, SPGAL based gates can be used to build secure hardware for low power portable electronic devices and Internet-of-Things (IoT) based electronic devices.

KW - Adiabatic logic

KW - Differential Power Analysis (DPA)

KW - Low-power hardware

KW - S-Box

KW - Symmetric Pass Gate Adiabatic Logic (SPGAL)

UR - http://www.scopus.com/inward/record.url?scp=84988925085&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84988925085&partnerID=8YFLogxK

U2 - 10.1109/ISVLSI.2016.45

DO - 10.1109/ISVLSI.2016.45

M3 - Conference contribution

AN - SCOPUS:84988925085

T3 - Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

SP - 308

EP - 313

BT - Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016

T2 - 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016

Y2 - 11 July 2016 through 13 July 2016

ER -

Energy-efficient and secure S-Box circuit using symmetric pass gate adiabatic logic

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

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