Enhancing process variation resilience in photonic noc architectures

Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review


Photonic network-on-chip (PNoC) architectures are a potential candidate for communications in future chip multi-processors as they can attain higher bandwidth with lower power dissipation than electrical NoCs. PNoCs typically use dense wavelength division multiplexing (DWDM) for high bandwidth transfers. Unfortunately, DWDM increases crosstalk noise and decreases optical signal to noise ratio (OSNR) in microring resonators (MRs) threatening the reliability of data communication. Additionally, process variations induce variations in the width and thickness of MRs causing shifts in resonance wavelengths of MRs, which further reduces signal integrity, leading to communication errors and loss in bandwidth. In this chapter, we propose a novel encoding mechanism that intelligently adapts to on-chip process variations, and improves worst-case OSNR by reducing crosstalk noise in MRs used within DWDM-based PNoCs. Experimental results on the Corona PNoC architecture indicate that the proposed approach improves worst-case OSNR by up to 44%.

Original languageEnglish
Title of host publicationPhotonic Interconnects for Computing Systems
Subtitle of host publicationUnderstanding and Pushing Design Challenges English
Number of pages22
ISBN (Electronic)9788793519794
StatePublished - Jun 30 2017

Bibliographical note

Publisher Copyright:
© 2017 River Publishers.

ASJC Scopus subject areas

  • General Engineering
  • General Computer Science


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