ESP: A flexible, high-performance, PLD-based network service

Emerging network-level services, such as Ephemeral State Processing (ESP), provide end systems with the ability to control the way in which their packets are processed at routers in the network. Supporting user-defined per-packet processing at today's wire-speeds requires significant computational power. Special-purpose Application Specific Integrated Circuit (ASIC) chips offer the performance, but not the extensibility needed to support these evolving services. In our previous work, we explored the use of programmable (general-purpose) network processors as a potential solution. Although network processors are easily extensible, they pay a performance penalty for that flexibility. In this paper, we explore a third approach; the use of Programmable Logic Devices (PLD) that combine the flexibility of a network processor with the performance of an ASIC. We describe a PLD implementation of the ESP service, discuss the challenges involved, and present performance numbers showing significant speedups over our previous network processor implementation.