Low-power low-latency data allocation for hybrid scratch-pad memory

Meikang Qiu, Zhi Chen, Meiqin Liu

Research output: Contribution to journalArticlepeer-review

108 Scopus citations


This letter aims at developing new memory architecture to overcome the daunting memory wall and energy wall issues in multicore embedded systems. We propose a new heterogeneous scratch-pad memory (SPM) architecture that is configured with SRAM, MRAM, and Z-RAM. Based on this architecture, we propose two algorithms: a dynamic programming (MDPDA) and a genetic algorithm (AGADA) to allocate data to different memory banks, therefore, reducing memory access cost in terms of power consumption and latency. Extensive experiments are performed to show the merits of the hybrid SPM memory architecture and the effectiveness of the proposed algorithms.

Original languageEnglish
Article number6871293
Pages (from-to)69-72
Number of pages4
JournalIEEE Embedded Systems Letters
Issue number4
StatePublished - Dec 1 2014

Bibliographical note

Publisher Copyright:
© 2009-2012 IEEE.


  • Data allocation
  • dynamic programming
  • genetic algorithm
  • hybrid memory
  • multicore
  • scratch-pad memory (SPM)

ASJC Scopus subject areas

  • Control and Systems Engineering
  • General Computer Science


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