L²5GC+: An Improved, 3GPP-compliant 5G Core for Low-latency Control Plane Operations

While 5G offers fast access networks and a high-performance data plane, the control plane in 5G core (5GC) still presents challenges due to inefficiencies in handling control plane operations (including session establishment, handovers and idle-to-active state-transitions) of 5G User Equipment (UE). The Service-based Interface (SBI) used for communication between 5G control plane functions introduces substantial overheads that impact latency. Typical 5GCs are supported in the cloud on containers, to support the disaggregated Control and User Plane Separation (CUPS) framework of 3GPP. L²5GC is a state-of-the-art 5G control plane design utilizing shared memory processing to reduce the control plane latency. However, L²5GC has limitations in supporting multiple user sessions and has programming language incompatibilities with 5GC implementations, e.g., free5GC, using modern languages such as GoLang. To address these challenges, we develop L²5GC+, a significant enhancement to L²5GC. L²5GC+ re-designs the shared-memory-based networking stack to support synchronous I/O between control plane functions. L²5GC+ distinguishes different user sessions and maintains strict 3GPP compliance. L²5GC+ also offers seamless integration with existing 5GC microservice implementations through equivalent SBI APIs, reducing code refactoring and porting efforts. By leveraging shared memory I/O and overcoming L²5GC's limitations, L²5GC+ provides an improved solution to optimize the 5G control plane, enhancing latency, scalability, and overall user experience. We demonstrate the improved performance of L²5GC+ on a 5G testbed with commercial basestations and multiple UEs.