Abstract
This paper presents a novel, energy-efficient DRAM refresh technique called massed refresh that simultaneously leverages bank-level and sub array-level concurrency to reduce the overhead of distributed refresh operations in the Hybrid Memory Cube (HMC). In massed refresh, a bundle of DRAM rows in a refresh operation is composed of two subgroups mapped to two different banks, with the rows of each subgroup mapped to different sub arrays within the corresponding bank. Both subgroups of DRAM rows are refreshed concurrently during a refresh command, which greatly reduces the refresh cycle time and improves bandwidth and energy efficiency of the HMC. Our experimental analysis shows that the proposed massed refresh technique achieves up to 6.3% and 5.8% improvements in throughput and energy-delay product on average over JEDEC standardized distributed per-bank refresh and state-of-the-art scattered refresh techniques.
Original language | English |
---|---|
Title of host publication | Proceedings - 29th International Conference on VLSI Design, VLSID 2016 - Held concurrently with 15th International Conference on Embedded Systems |
Pages | 104-109 |
Number of pages | 6 |
ISBN (Electronic) | 9781467387002 |
DOIs | |
State | Published - Mar 16 2016 |
Event | 29th International Conference on VLSI Design, VLSID 2016 - Kolkata, India Duration: Jan 4 2016 → Jan 8 2016 |
Publication series
Name | Proceedings of the IEEE International Conference on VLSI Design |
---|---|
Volume | 2016-March |
ISSN (Print) | 1063-9667 |
Conference
Conference | 29th International Conference on VLSI Design, VLSID 2016 |
---|---|
Country/Territory | India |
City | Kolkata |
Period | 1/4/16 → 1/8/16 |
Bibliographical note
Publisher Copyright:© 2016 IEEE.
Keywords
- Bank-level parallelism
- DRAM
- Distributed refresh
- Energy-ef-ficiency
- Hybrid Memory Cube
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering