Metal-insulator-semiconductor structures on p-type GaAs with low interface state density

Zhi Chen, Dae Gyu Park, Francke Stengal, S. Noor Mohammad, Hadis Morkoç

Research output: Contribution to journalArticlepeer-review

54 Scopus citations


Interfacial properties of in situ deposited Si3N4/Si/p-GaAs metal-insulator-semiconductor structures have been investigated. Conductance loss measurements show that a minimum interface trap density as low as 5.5X1010 cm-1 eV-1 has been achieved on p-type GaAs by using a high quality strained Si interlayer. The quasistatic and high-frequency capacitance-voltage measurements as well as the theoretical high-frequency capacitance-voltage calculation clearly demonstrate the accumulation, depletion, and inversion regions. The interface trap density as a function of the band-gap energy near the midgap has been determined with the conductance method. The reduced band bending (0.84 V) may be mainly caused by the narrower band gap of the strained Si interlayer.

Original languageEnglish
Pages (from-to)230-232
Number of pages3
JournalApplied Physics Letters
Issue number2
StatePublished - Jul 8 1996

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)


Dive into the research topics of 'Metal-insulator-semiconductor structures on p-type GaAs with low interface state density'. Together they form a unique fingerprint.

Cite this