Silicon based Physical Unclonable Function (PUF) is a popular hardware security primitive for mitigating security vulnerabilities. Recently, Quasi-adiabatic logic based physical unclonable function (QUALPUF) was first proposed by Kumar and Thapliyal. QUALPUF has ultra low-power dissipation; hence it is suitable to implement in low-power portable electronic devices such RFIDs, wireless sensor nodes, etc. In this paper, we present the post-layout simulation results of the 4-bit QUALPUF for low-power portable electronic devices. To evaluate the uniqueness and reliability, the 4-bit QUALPUF is implemented in 0.18 um standard CMOS process with 1.8 V supply voltage. The QUALPUF occupies 58.7x15.7 um2 of layout area. The post-layout simulation results illustrate that the 4-bit QUALPUF has good uniqueness and reliability with 29.73 fJ/cycle/bit energy consumption.
|Title of host publication||Proceedings - 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019|
|Number of pages||4|
|State||Published - Jul 2019|
|Event||18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019 - Miami, United States|
Duration: Jul 15 2019 → Jul 17 2019
|Name||Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI|
|Conference||18th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019|
|Period||7/15/19 → 7/17/19|
Bibliographical noteFunding Information:
This work was supported by VLSI Design and Educational Center (VDEC), the University of Tokyo in collaboration with Cadence Corporation and Synopsys, Inc. The VLSI chip in this study has been fabricated in the chip fabrication program of VDEC, the University of Tokyo in collaboration with ROHM Corporation and Toppan Printing Corporation.
© 2019 IEEE.
- Adiabatic logic
- hardware security
ASJC Scopus subject areas
- Hardware and Architecture
- Control and Systems Engineering
- Electrical and Electronic Engineering