The compact size and high wavelength selectivity of microring resonators (MRs) enable photonic networks-on-chip (PNoCs) to utilize dense-wavelength-division-multiplexing (DWDM) in photonic waveguides to attain high bandwidth on-chip data transfers. A Hardware Trojan in a PNoC can manipulate the electrical driving circuit of its MRs to cause the MRs to snoop data from the neighboring wavelength channels in a shared photonic waveguide. This introduces a serious security threat. This paper presents a framework that utilizes process variation based authentication signatures along with architecture-level enhancements to protect data in PNoCs from data-snooping Hardware Trojans. Evaluation results indicate that our approach can significantly enhance the hardware security in DWDM-based PNoCs with minimal overheads of up to 17.3% in average latency and of up to 15.2% in energy-delay-product (EDP).
|Title of host publication||2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018|
|State||Published - Oct 26 2018|
|Event||12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018 - Torino, Italy|
Duration: Oct 4 2018 → Oct 5 2018
|Name||2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018|
|Conference||12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018|
|Period||10/4/18 → 10/5/18|
Bibliographical noteFunding Information:
This research is supported by grants from SRC, NSF (CCF-1252500, CCF-1302693, CCF-1813370), AFOSR (FA9550-13-1-0110), and Micron Technology, Inc.
© 2018 IEEE.
- Hardware Security
- Photonic NoCs
- Process Variations
ASJC Scopus subject areas
- Computer Networks and Communications
- Hardware and Architecture