Speculative predication across arbitrary interprocedural control flow

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations


The next generation of microprocessors, particularly IA64, will incorporate hardware mechanisms for instruction-level predication in support of speculative parallel execution. However, the compiler technology proposed in support of this speculation is incapable of speculating across loops or procedural boundaries (function call and return). In this paper, we describe compiler technology that can support instruction-level speculation across arbitrary control flow and procedural boundaries. Our approach is based on the concept of converting a conventional control flow graph into a meta state graph in which each meta state represents a set of original states speculatively executed together.

Original languageEnglish
Title of host publicationLanguages and Compilers for Parallel Computing - 12th International Workshop, LCPC 1999, Proceedings
EditorsLarry Carter, Jeanne Ferrante
Number of pages15
StatePublished - 2000
Event12th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1999 - La Jolla, United States
Duration: Aug 4 1999Aug 6 1999

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Conference12th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1999
Country/TerritoryUnited States
CityLa Jolla

Bibliographical note

Publisher Copyright:
© Springer-Verlag Berlin Heidelberg 2000.

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


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