Abstract
Last year, we discussed the issues surrounding the development of languages and compilers for a general, portable, high-level SIMD With in A Register (SWAR) execution model. In a first effort to provide such a language and a framework for further research on this form of parallel processing, we proposed the vector-based language SWARC, and an experimental module compiler for this language, called Scc, which targeted IA32+MMX-based architectures. Since that time, we have worked to expand the types of targets that Scc supports and to include optimizations based on both vector processing and enhanced hardware support for SWAR. This paper provides a more formal description of the SWARC language, describes the organization of the current version of the Scc compiler, and discusses the implementation of optimizations within this framework.
Original language | English |
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Title of host publication | Languages and Compilers for Parallel Computing - 12th International Workshop, LCPC 1999, Proceedings |
Editors | Larry Carter, Jeanne Ferrante |
Pages | 399-414 |
Number of pages | 16 |
DOIs | |
State | Published - 2000 |
Event | 12th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1999 - La Jolla, United States Duration: Aug 4 1999 → Aug 6 1999 |
Publication series
Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
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Volume | 1863 |
ISSN (Print) | 0302-9743 |
ISSN (Electronic) | 1611-3349 |
Conference
Conference | 12th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1999 |
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Country/Territory | United States |
City | La Jolla |
Period | 8/4/99 → 8/6/99 |
Bibliographical note
Publisher Copyright:© Springer-Verlag Berlin Heidelberg 2000.
ASJC Scopus subject areas
- Theoretical Computer Science
- General Computer Science