Abstract
In most programming languages, data is organized in structures that are explicitly mapped to machine words each containing a fixed number of bits. For example, a C variable declared as an int might be specified to be represented by a 32-bit word. Given computer hardware in which data are organized as fixed-size words, this seems intuitive and efficient. However, if the integer is known to always have a value between 0 and 100, at most only seven of those 32 bits are needed; the other 25 bits are always 0. Programming languages like C allow integer variables to be declared as having any of several bit precisions, so declaring the variable as uint8_t could reduce waste to just one bit. The catch is the index is only seven bits long when it holds a value greater than 63. Operating on more bits than necessary dramatically increases both the storage space and the number of gate operations needed to perform operations like addition or multiplication. The solution proposed here is to implement a programming model in which integer and floating-point variables are represented by just enough bits to represent the values they contain at that moment in execution. The overhead involved in dynamically adjusting precision is significant, thus it is only used for SIMD-parallel variables implemented using the PBP execution model.
Original language | English |
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Title of host publication | Languages and Compilers for Parallel Computing - 35th International Workshop, LCPC 2022, Revised Selected Papers |
Editors | Charith Mendis, Lawrence Rauchwerger |
Pages | 91-105 |
Number of pages | 15 |
DOIs | |
State | Published - 2023 |
Event | 35th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2022 - Chicago, United States Duration: Oct 12 2022 → Oct 14 2022 |
Publication series
Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
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Volume | 13829 LNCS |
ISSN (Print) | 0302-9743 |
ISSN (Electronic) | 1611-3349 |
Conference
Conference | 35th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2022 |
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Country/Territory | United States |
City | Chicago |
Period | 10/12/22 → 10/14/22 |
Bibliographical note
Publisher Copyright:© 2023, The Author(s), under exclusive license to Springer Nature Switzerland AG.
Keywords
- bit slice
- bit-serial arithmetic
- floating point
- integer arithmetic
- Parallel Bit Pattern computing
- SIMD
- variable precision arithmetic
ASJC Scopus subject areas
- Theoretical Computer Science
- Computer Science (all)