A Bit-Parallel Deterministic Stochastic Multiplier

Sairam Sri Vatsavai; Ishan Thakkar

doi:10.1109/ISQED57927.2023.10129297

A Bit-Parallel Deterministic Stochastic Multiplier

Sairam Sri Vatsavai
, Ishan Thakkar

Producción científica: Conference contribution › revisión exhaustiva

5 Citas (Scopus)

Resumen

This paper presents a novel bit-parallel deterministic stochastic multiplier, which improves the area-energy-latency product by up to 10.6×104, while improving the computational error by 32.2%, compared to three prior stochastic multipliers.

Idioma original	English
Título de la publicación alojada	Proceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023
ISBN (versión digital)	9798350334753
DOI	https://doi.org/10.1109/ISQED57927.2023.10129297
Estado	Published - 2023
Evento	24th International Symposium on Quality Electronic Design, ISQED 2023 - San Francisco, United States Duración: abr 5 2023 → abr 7 2023

Serie de la publicación

Nombre	Proceedings - International Symposium on Quality Electronic Design, ISQED
Volumen	2023-April
ISSN (versión impresa)	1948-3287
ISSN (versión digital)	1948-3295

Conference

Conference	24th International Symposium on Quality Electronic Design, ISQED 2023
País/Territorio	United States
Ciudad	San Francisco
Período	4/5/23 → 4/7/23

Nota bibliográfica

Publisher Copyright:
© 2023 IEEE.

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality

Acceder al documento

10.1109/ISQED57927.2023.10129297

Otros archivos y enlaces

Citar esto

@inproceedings{31b1e4b758f648e8a206bc8d154863fa,

title = "A Bit-Parallel Deterministic Stochastic Multiplier",

abstract = "This paper presents a novel bit-parallel deterministic stochastic multiplier, which improves the area-energy-latency product by up to 10.6×104, while improving the computational error by 32.2\%, compared to three prior stochastic multipliers.",

author = "Vatsavai, \{Sairam Sri\} and Ishan Thakkar",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 24th International Symposium on Quality Electronic Design, ISQED 2023 ; Conference date: 05-04-2023 Through 07-04-2023",

year = "2023",

doi = "10.1109/ISQED57927.2023.10129297",

language = "English",

series = "Proceedings - International Symposium on Quality Electronic Design, ISQED",

booktitle = "Proceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023",

}

Vatsavai, SS & Thakkar, I 2023, A Bit-Parallel Deterministic Stochastic Multiplier. En Proceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023. Proceedings - International Symposium on Quality Electronic Design, ISQED, vol. 2023-April, 24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, United States, 4/5/23. https://doi.org/10.1109/ISQED57927.2023.10129297

TY - GEN

T1 - A Bit-Parallel Deterministic Stochastic Multiplier

AU - Vatsavai, Sairam Sri

AU - Thakkar, Ishan

PY - 2023

Y1 - 2023

N2 - This paper presents a novel bit-parallel deterministic stochastic multiplier, which improves the area-energy-latency product by up to 10.6×104, while improving the computational error by 32.2%, compared to three prior stochastic multipliers.

AB - This paper presents a novel bit-parallel deterministic stochastic multiplier, which improves the area-energy-latency product by up to 10.6×104, while improving the computational error by 32.2%, compared to three prior stochastic multipliers.

UR - https://www.scopus.com/pages/publications/85161543115

UR - https://www.scopus.com/pages/publications/85161543115#tab=citedBy

U2 - 10.1109/ISQED57927.2023.10129297

DO - 10.1109/ISQED57927.2023.10129297

M3 - Conference contribution

AN - SCOPUS:85161543115

T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED

BT - Proceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023

T2 - 24th International Symposium on Quality Electronic Design, ISQED 2023

Y2 - 5 April 2023 through 7 April 2023

ER -

A Bit-Parallel Deterministic Stochastic Multiplier

Resumen

Serie de la publicación

Conference

Nota bibliográfica

ASJC Scopus subject areas

Acceder al documento

Otros archivos y enlaces

Huella

Citar esto