@inproceedings{36da143868ef4273ac9b16efb0315b6a,
title = "A reversible version of 4 × 4 bit array multiplier with minimum gates and garbage outputs",
abstract = "This paper presents the novel design and synthesis of 4×4 bit reversible logic based array multiplier. The proposed reversible circuit has the ability to multiply two 4-bits binary numbers which can be generalized for NXN bit. It is also shown that the proposed design technique generates the reversible binary array multiplier with minimum number of gates as well as the minimum number of garbage outputs.",
keywords = "Reversible logic, Reversible multiplier",
author = "Himanshu Thapliyal and Srinivas, \{M. B.\} and Arabnia, \{Hamid R.\}",
year = "2005",
language = "English",
isbn = "9781932415537",
series = "Proceedings of the 2005 International Conference on Embedded Systems and Applications, ESA'05",
pages = "106--113",
booktitle = "Proceedings of the 2005 International Conference on Embedded Systems and Applications, ESA'05",
note = "2005 International Conference on Embedded Systems and Applications, ESA'05 ; Conference date: 27-06-2005 Through 30-06-2005",
}