Design of reversible adder-subtractor and its mapping in optical computing domain

Reversible logic has promising applications in dissipation less optical computing, low power computing, quantum computing, etc. Reversible circuits do not lose information, and there is a one-to-one mapping between the input and the output vectors. In recent years, researchers have implemented reversible logic gates in optical domain as it provides high-speed and low-energy computations. Reversible gates can be easily fabricated at the chip level using optical computing. The optical implementation of reversible logic gates are based on semiconductor optical amplifier (SOA)-based Mach-Zehnder interferometer (MZI). The Mach-Zehnder interferometer has advantages such as high speed, low power, easy fabrication, and fast switching time. In this work, we present the optical implementation of an n bit reversible ripple carry adder. The optical reversible adder design is based on two new optical reversible gates referred to as optical reversible gate I (ORG-I) and optical reversible gate II (ORG-II) and the existing optical Feynman gate. The two new reversible gates ORG-I and ORG-II are proposed as they can implement a reversible adder with reduced optical cost which is the measure of number of MZIs switches and the propagation delay, and with zero overhead in terms of the number of ancilla inputs and the garbage outputs. The proposed optical reversible adder design based on the ORG-I and ORG-II reversible gates are compared and shown to be better than the other existing designs of reversible adder proposed in non-optical domain in terms of the number of MZIs, delay, the number of ancilla inputs, and the garbage outputs. A subtraction operation can be defined as a − b = ¯a + b and a − b = a + b + 1, respectively. Next, we propose the design methodologies based on (i) a − b = a + b, and (ii) a − b = a +¯b + 1, to design a reversible adder-subtractor that is controlled by the control signal to perform addition or subtraction operation.