Design, synthesis and test of reversible circuits for emerging nanotechnologies

Reversible circuits can generate unique output vector from each input vector, and vice-versa, that is, there is a one-to-one mapping between the input and the output vectors. The contributions of the dissertation include a novel reversible gate particularly suitable for reversible arithmetic, several designs for reversible arithmetic such as binary and BCD adders, sub tractors and comparators, a set of reversible sequential circuits such as latches, flip-flops, and shift registers. Unlike previous works, the above designs are optimized for multiple parameters such as ancilla and garbage bits, quantum cost and delay. Another important contribution is the application of conservative reversible logic towards online and offline testing of single as well as multiple faults in reversible as well as traditional logic VLSI circuits.