Energy-recovery based hardware security primitives for low-power embedded devices

Hardware based security vulnerabilities such as side-channel attacks, IC piracy, IC counterfeiting, etc. are major threats for the successful deployment of the embedded computing systems. Further, the embedded computing devices work on a limited power supply (battery operated devices), and therefore have stringent constraints on power consumption. In this paper, we propose Energy Recovery (ER) computing as a novel platform to design low-power hardware security primitives for embedded computing devices. As a case study, we have discussed the design of two important ER-based hardware security primitives: (i) low-power and Differential Power Analysis (DPA) resistant PRESENT cryptographic core, (ii) low-power Physically Unclonable Function (PUF). Through simulations, it is illustrated that the ER computing based hardware security primitives are low-power as compared to the existing approaches. For example, the PRESENT-80 cryptographic algorithm implemented using ER computing consumes 45% less power as compared to its CMOS implementation. Further, ER computing in emerging devices such as FinFET and Tunnel FET to design low-power hardware security primitives is also illustrated.