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Scaling Analog Photonic Accelerators for Byte-Size, Integer General Matrix Multiply (GEMM) Kernels

Producción científica: Conference contributionrevisión exhaustiva

Resumen

Deep Neural Networks (DNNs) predominantly rely on General Matrix Multiply (GEMM) kernels, which are often accelerated using specialized hardware architectures. Recently, analog photonic GEMM accelerators have emerged as a promising alternative, offering vastly superior speed and energy efficiency compared to traditional electronic accelerators. However, these photonic cannot support wider than 4-bit integer operands due to their inherent tradeoffs between analog dynamic range and parallelism. This is often inadequate for DNN training as at least 8-bit wide operands are deemed necessary to prevent significant accuracy drops. To address these limitations, we introduce a scalable photonic GEMM accelerator named SPOGA. SPOGA utilizes enhanced features such as analog summation of homo-dyne optical signals and in-transduction positional weighting of operands. By employing an extended optical-analog dataflow that minimizes overheads associated with bit-sliced integer arithmetic, SPOGA supports byte-size integer GEMM kernels, achieving significant improvements in throughput, latency, and energy efficiency. Specifically, SPOGA demonstrates up to 14.4x, 2 x, and 28.5 x improvements in frames-per-second (FPS), FPS/Watt, and FPS/Watt/mm2 respectively, compared to existing state-of-the-art photonic solutions.

Idioma originalEnglish
Título de la publicación alojada2024 IEEE Computer Society Annual Symposium on VLSI
Subtítulo de la publicación alojadaEmerging VLSI Technologies and Architectures, ISVLSI 2024
EditoresHimanshu Thapliyal, Jurgen Becker
Páginas409-414
Número de páginas6
ISBN (versión digital)9798350354119
DOI
EstadoPublished - 2024
Evento2024 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2024 - Knoxville, United States
Duración: jul 1 2024jul 3 2024

Serie de la publicación

NombreProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
ISSN (versión impresa)2159-3469
ISSN (versión digital)2159-3477

Conference

Conference2024 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2024
País/TerritorioUnited States
CiudadKnoxville
Período7/1/247/3/24

Nota bibliográfica

Publisher Copyright:
© 2024 IEEE.

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ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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